mirror of
https://github.com/wassname/simpeg.git
synced 2026-06-29 14:24:02 +08:00
7f0d8e4920990f8a02854ec9bc030120ef19b4a2
simpegdc
A DC resistivity forward modelling and inversion package for SimPEG.
Documentation: http://simpeg-dc.readthedocs.org/en/latest/
Code: https://github.com/simpeg/simpegdc
Tests: https://travis-ci.org/simpeg/simpegdc
Bugs & Issues: https://github.com/simpeg/simpegdc/issues
Languages
Python
99.6%
Cython
0.4%

