mirror of
https://github.com/wassname/simpeg.git
synced 2026-07-08 15:12:41 +08:00
dc6009f9c8711d8597e90ce6cb74925af2123f36
simpegdc
A DC resistivity forward modelling and inversion package for SimPEG.
Documentation: http://simpeg-dc.readthedocs.org/en/latest/
Code: https://github.com/simpeg/simpegdc
Tests: https://travis-ci.org/simpeg/simpegdc
Bugs & Issues: https://github.com/simpeg/simpegdc/issues
Languages
Python
99.6%
Cython
0.4%

